The present invention pertains generally to decommutators and more specifically to a decommutator for accumulating pulse inputs in a series of parallel channels such that the output of any one of the channels can be addressed by a single display device. Conventional methods of decommutation generally utilize the process of simply reversing the multiplexing system. Therefore, to decommutate any predetermined number of signals, the decommutator is required to switch to that predetermined number of different outputs when a multiplicity of signals have been multiplexed into a single input signal. This requires a multiplicity of separate outputs to properly decommutate the signals. Conventional decommutators therefore require a multiplicity of counters and displays to accumulate pulses in any particular channel for display. In most instances, it is not necessary to observe all of the channels at once. The duplication of output displays and counters, although required in the conventional decommutator, is therefore many times an excessive and unnecessary expense required in its construction.